1. Field of the Invention
The present invention generally relates to semiconductor devices, and more particularly to a semiconductor device having a plurality of semiconductor chips within a package thereof.
2. Description of the Prior Art
Recently, a highly integrated chip-on-chip type semiconductor device which has a plurality of semiconductor chips provided in a single package has been used so as to satisfy the requirement of downsizing for electronic equipments. In order to reduce a semiconductor chip in its weight and size, it is required to have a thinner package.
FIG. 1 is a cross sectional view of an example of a conventional chip-on-chip type semiconductor device. A conventional semiconductor device 11 comprises semiconductor chip 14a mounted on an upper surface of a die stage 12 with an adhesive 13a. A semiconductor chip 14b is mounted on a bottom surface of the die stage 12 with an adhesive 13b. The semiconductor chip 14b is mounted upside down relative to the semiconductor chip 14a. The semiconductor chip 14a is electrically connected to lead frames 16a and 16b by bonding wires 15a and 15b respectively, so that the semiconductor chip 14a can be electrically connected to external devices. Similarly, the semiconductor chip 14b is electrically connected to lead frames 16a and 16b by bonding wires 15c and 15d, respectively so that the semiconductor chip 14b can be electrically connected to external devices.
FIG. 2 is a cross sectional view of another example of a conventional chip-on-chip type semiconductor device. As shown in FIG. 2, a conventional semiconductor device 1 comprises two semiconductor chips 3a and 3b. The semiconductor chips 3a and 3b are positioned in a center opening section of a lead frame 2. The surfaces of respective semiconductor chips 3a and 3b, which are provided with circuitry, are directed upward. The semiconductor chip 3a is attached to an end of each of TAB (Tape Automated Bonding) leads 5a and 5b which are bent as shown in FIG. 2, by means of inner lead bonding. The semiconductor chip 3b is connected to an end of each of TAB leads 5c and 5d by means of inner lead bonding. The TAB leads 5a and 5b are bent so that a predetermined space is formed between the bottom surface 3a" of the semiconductor chip 3a and the top surface 3b' of the semiconductor chip 3b.
The other end of each of the TAB leads 5a, 5b, 5c and 5d is connected to the respective outer lead 6 of the lead frame 2 by means of outer lead bonding. The semiconductor chips 3a and 3b are packaged using molding resin 7 by means of transfer molding. The outer lead 6 is bent, for example, in an L or J shape so that the packaged semiconductor device 1 can be surface mounted on a circuit board (not shown in the figure).
FIGS. 3A and 3B are views showing another example of a conventional chip-on-chip type semiconductor device; FIG. 3A is a cross sectional view taken along a line X--X' of FIG. 3B; FIG. 3B is a plan view.
A semiconductor device 21 shown in FIG. 3A comprises semiconductor chips 22a and 22b connected to the respective TAB leads 23a, 23b, and 23c, 23d by means of inner lead bonding. The semiconductor chip 22a is supported by TAB leads 23a and 23b, and the semiconductor chip 22b is supported by TAB leads 23c and 23d. The semiconductor chip 22a is connected to lead frames 24a and 24b via the TAB leads 23a and 23b, respectively and the semiconductor chip 22b is connected to lead frames 24a and 24b via the TAB leads 23c and 23d, respectively. The semiconductor chip 22a is positioned upside down relative to the semiconductor chip 22b. Accordingly, the semiconductor chips 22a and 22b can be electrically connected to external devices. It should be noted that each of TAB leads 23a, 23b, 23c and 23d is bent as shown in FIG. 3A so that a space is formed between the semiconductor chip 22a and the semiconductor chip 22b.
FIG. 4 is a cross sectional view of another example of a conventional chip-on-chip type semiconductor device. A semiconductor device 31 shown in FIG. 4 comprises two semiconductor chips 32a and 32b, the semiconductor chip 32a being upside down relative to the semiconductor chip 32a. The semiconductor chip 32a is supported by TAB leads 33a and 33b, and the semiconductor chip 32b is supported by TAB leads 33c and 33d. The semiconductor chips 32a and 32b are connected to a lead frame 34a via the respective TAB leads 33a and 33c, and connected to a lead frame 34b via the respective TAB leads 33b and 33d. Accordingly, the semiconductor chips 32a and 32b can be electrically connected to external devices via the lead frames 34a and 34b. It should be noted that each of the TAB leads 33a, 33b, 33c and 33d is straight as shown in FIG. 4
In the above-mentioned conventional semiconductor devices, there are problems described below.
In a manufacturing process of the semiconductor device 11 shown in FIG. 1, the semiconductor chip 14a is attached first to the die stage 12. After that, the die stage 12 is reversed so that the semiconductor chip 14a is positioned underneath the die stage 12 in order to mount the semiconductor chip 14b on the reverse surface of the die stage 12. When mounting the semiconductor chip 14b, the semiconductor chip 14b is required to be pressed by a die via the surface of the semiconductor chip 14b as shown in FIG. 5.
In order to prevent the die stage from moving when the semiconductor chip 14b is pressed, the die stage 12 is fixed to a die table 18, and the semiconductor chip 14a is supported by the die table 18. There is a problem in that the surface of the semiconductor chip 14a may be damaged when the semiconductor chip 14a makes contact with the surface of the die table 18.
Additionally, if the semiconductor chip 14b is mounted on the die stage 12 after the semiconductor chip 14a is wire bonded, there may be a problem in that a bonding wire is bent or deformed by the reason the same as above.
In the case of the semiconductor device 1 of FIG. 2 and the semiconductor device 21 of FIG. 3A and 3B, two semiconductor chips are attached to the TAB leads on either side. Accordingly, semiconductor chips are supported only by the TAB leads before they are packaged, and thus the semiconductor chips tend to be displaced when a transfer molding process is applied.
A description will now be given, with reference to FIGS. 6A and 6B, of the transfer molding process of the semiconductor device 1 as an example.
As shown in FIG. 6A, the lead frame 2 and the semiconductor chips 3a and 3b are placed inside a cavity 9 formed between an upper mold 8a and a lower mold 8b after the semiconductor chips 3a and 3b are attached to the lead frame 2 via the respective TAB leads 5a, 5b, 5c and 5d. The transfer molding is performed by injecting an amount of melted molding resin into the cavity 9 via a gate 10. At the initial stage of injection, as shown in FIG. 6A, little force is applied to the semiconductor chips 3a and 3b, and thus the semiconductor chips 3a and 3b stay in the respective predetermined supported positions.
However, as the molding resin progresses to the far end of the semiconductor chips 3a and 3b from the gate 10, forces in various directions are applied to the semiconductor chips 3a and 3b due to the flow of the viscous molding resin. Since the semiconductor chip 3a is supported only by the TAB leads 5a and 5b which are made of thin films having a low rigidity since and, they are bent, as shown in the figure, the TAB leads may be deformed by the forces applied to the semiconductor chip 3a by the resin flow. The TAB leads 5a and 5b are formed of, for example, a polyimide film having a thickness of 125 .mu.m with a copper pattern film having a thickness of 35 .mu.m adhering thereto. Accordingly, the semiconductor chip 3a may be displaced and the TAB leads 5a and 5b may be deformed, due to the flow of the molding resin.
Although the semiconductor chip 3b is supported by the TAB leads 5c and 5d which are not bent like TAB leads 5a and 5b, the semiconductor chip 3b may be displaced slightly because the TAB leads 5c and 5d are formed of the same materials having a low rigidity as that of the TAB leads 5a and 5b.
In order to eliminate the above-mentioned problem caused by the flow of the molding resin, various molding methods are suggested in which the viscosity of the molding resin is changed or the position of the gate 6 is changed so that the flow of the molding resin does not affect the position of the semiconductor chips 3a and 3b. However, even if the injection conditions are appropriately controlled, the semiconductor chips 3a and 3b may be displaced due to variability of manufacturing accuracy of the TAB leads.
If the semiconductor chips 3a and 3b are displaced and the TAB leads are accordingly deformed, the TAB lead 5d may be in contact with the surface 3a' of the semiconductor chip 3a or the TAB lead 5a may be in contact with an upper edge of the semiconductor chip 3a, which conditions result in a short circuit in the semiconductor device. This is a problem common, as well, to the semiconductor devices 21 and 31 of the preceding FIGS. 3A to 4.
Additionally, there are two other problems in the semiconductor device 21 shown in FIG. 3a. One problem is, as described below, that one of the semiconductor chips 22a and 22b must be mirror symmetric to the other one. The other problem is, as described below, that the wiring to a chip selector pad is complex when the semiconductor chips are wired so that each of the semiconductor chips performs a different operation.
As shown in FIG. 3A, the TAB lead 23b connected to the pad 25a of the semiconductor chip 22a and the TAB lead 23d connected to the pad 25b of the semiconductor chip 22b are both connected to the same lead frame 24b. Accordingly, the pad 25a of the semiconductor chip 22a and the pad 25b of the semiconductor chip 22b must be pads having the same electrical function. Therefore, the semiconductor chips 22a and 22b must be mirror symmetric to each other with respect to the pads provided on the surfaces of the semiconductor chips 22a and 22b. Due to the above, it is difficult to provide the same two semiconductor chips, that is semiconductor chips having the same pad construction, in a single package.
Additionally, in the existing semiconductor chip technology, independent voltage signals are individually supplied to the semiconductor chips 22a and 22b so that the semiconductor chips 22a and 22b perform different operations. Therefore, as shown in a semiconductor device 21a of FIGS. 7A and 7B, a TAB lead 30 must be extended as indicated by dashed lines in the figures. FIG. 7A is a cross sectional view of the semiconductor device 21a taken along a line 7A--7A in FIG. 7B; FIG. 7B is a plan view of a portion of the semiconductor device 21a. The TAB lead 30 is extended from a pad 27 to a lead frame 29 which not is located in the position nearest to the pad 27 while TAB lead 23a is connected to the lead frame 28 in a position nearest to the pad 26. If the lead frames 28 and 29 are located adjacent to each other, the TAB lead 30 can be extended to the lead frame 29. However, if the lead frame 29 is provided in a position distant from the lead frame 28, it is difficult to extend the TAB lead 30 to the distant lead frame 29. That is, there is a problem, in such a case, that the wiring to the chip select pad cannot be performed.